DocumentCode :
2303903
Title :
A high fidelity decimation filter for sigma-delta converters
Author :
Kale, I. ; Morling, R.C.S. ; Krukowski, A. ; Devine, D.A.
Author_Institution :
Westminster Univ., UK
fYear :
1994
fDate :
6-8 Jul 1994
Firstpage :
30
Lastpage :
35
Abstract :
This paper reports on results from the algorithmic design and simulation of a two-path poly-phase decimation filter with 24-bit accuracy over the frequency range from dc to approximately 16kHz. The filter is suited for very high precision data conversion applications, and has been designed for use with a fourth-order ΣΔ modulator running at 4096 kHz. This paper also reports on the fixed-point architectural design, comparative bit-level simulations and silicon implementation
Keywords :
IIR filters; all-pass filters; cascade networks; digital arithmetic; recursive filters; sigma-delta modulation; 0 Hz to 16 kHz; 24 bit; 4096 kHz; all-pass IIR filters; comparative bit-level simulations; fixed-point architectural design; fourth-order Sigma Delta modulator; high fidelity decimation filter; precision data conversion applications; recursive digital filters; sigma-delta converters; silicon implementation; two-path poly-phase decimation filter;
fLanguage :
English
Publisher :
iet
Conference_Titel :
Advanced A-D and D-A Conversion Techniques and their Applications, 1994. Second International Conference on
Conference_Location :
Cambridge
Print_ISBN :
0-85296-617-2
Type :
conf
DOI :
10.1049/cp:19940539
Filename :
346589
Link To Document :
بازگشت