DocumentCode
2304039
Title
An 8-b 50-MHz 225-mW submicron CMOS ADC using saturation eliminated comparators
Author
Matsuura, Tatsuji ; Kojima, Hirotsugu ; Imaizumi, Eiki ; Usui, Kunihiko ; Ueda, Seiichi
Author_Institution
Hitachi Ltd., Tokyo, Japan
fYear
1990
fDate
13-16 May 1990
Abstract
The fastest, low-power 8-b CMOS subranging A/D converter with a 50-MHz conversion rate and 225-mW power consumption is realized using 0.8-μm CMOS technology. The comparator used in the converter has a saturation elimination circuit, which eliminates the comparison delay caused by saturation. This circuit is useful for improving conversion speed or reducing converter power consumption. It is also effective in achieving low-power medium-speed converters. An 8-b 20-MHz 65-mW A/D converter can also be achieved with the same circuitry by decreasing the bias current. Therefore, this new converter makes it possible to realize mixed digital-analog ASICs for HDTV and for ED/IDTV applications
Keywords
CMOS integrated circuits; analogue-digital conversion; 0.8 micron; 20 MHz; 225 mW; 50 MHz; 65 mW; conversion rate; low-power; mixed digital-analog ASICs; monolithic IC; power consumption; saturation eliminated comparators; saturation elimination circuit; submicron CMOS ADC; subranging A/D converter; CMOS technology; Choppers; Circuit noise; Delay; Energy consumption; Inverters; Power supplies; Sampling methods; Signal sampling; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1990., Proceedings of the IEEE 1990
Conference_Location
Boston, MA
Type
conf
DOI
10.1109/CICC.1990.124673
Filename
124673
Link To Document