Increasing Manufacturing Yield for Wideband RF CMOS LNAs in the Presence of Process Variations

In this paper, the authors develop several design techniques for reducing the impact of manufacturing variations on integrated wideband low noise amplifiers (LNA). Utilizing an efficient modeling and automated design methodology, the authors investigate the sensitivity of LNA performance metrics to process variations and determine that the input impedance matching is particularly sensitive to perturbations in component values. Based on the sensitivity analysis, the authors leverage several design techniques to increase the reliability of LNA designs. To mitigate the impact of process variations on the input impedance matching, the authors add additional circuit elements and tunable capacitors to dynamically compensate for manufacturing variations after fabrication. The results indicate that the proposed design techniques can increase manufacturing yield by up to one order of magnitude for input impedance matching with only a 14% increase in noise figure