Title :
An Infrastructure IP for Online Testing of Network-on-Chip Based SoCs
Author :
Bhojwani, Praveen ; Mahapatra, Rabi N.
Author_Institution :
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX
Abstract :
To address the reliability concerns that affect the lifetime of complex systems-on-a-chip (SoC) designs, a concurrent on-line SoC test scheme is essential to circumvent the prohibitive costs - test time and test power $associated with off-line SoC test. A test infrastructure IP (TI-IP) is deployed within the network-on-chip (NoC) based SoC design to provide on-line test support while managing the intrusion of test into the executing applications within the system. This research describes the architecture and operation of a TI-IP capable of testing SoCs and demonstrates its operation in two SoC test configurations developed using research domain application and test benchmarks
Keywords :
built-in self test; integrated circuit testing; network-on-chip; reliability; SoC; infrastructure IP; integrated circuit testing; network-on-chip; online testing; reliability concerns; systems-on-a-chip designs; Costs; Energy consumption; Energy management; Life testing; Network-on-a-chip; Power system management; Power system reliability; Runtime; System testing; System-on-a-chip;
Conference_Titel :
Quality Electronic Design, 2007. ISQED '07. 8th International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
0-7695-2795-7
DOI :
10.1109/ISQED.2007.35