Title :
TSV technology and challenges for 3D stacked DRAM
Author :
Chang Yeol Lee ; Sungchul Kim ; Hongshin Jun ; Kyung Whan Kim ; Sung Joo Hong
Author_Institution :
DRAM Dev. Div., SK hynix, Icheon, South Korea
Abstract :
A successful integration of Via-middle TSV process in DRAM technology with major process issues is introduced. Fast TSV open/short detection and how to trade-off in choice repair scheme is discussed. Process development for TSV volume shrink required to reduce dynamic power for driving TSV. Fast Cu leak monitor method is essential to sustaining good quality and Fab process control.
Keywords :
DRAM chips; three-dimensional integrated circuits; 3D stacked DRAM technology; TSV volume shrink; fab process control; fast Cu leak monitor method; fast TSV open-short detection; via-middle TSV process; Maintenance engineering; Metals; Process control; Random access memory; Stacking; Three-dimensional displays; Through-silicon vias;
Conference_Titel :
VLSI Technology (VLSI-Technology): Digest of Technical Papers, 2014 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4799-3331-0
DOI :
10.1109/VLSIT.2014.6894397
