DocumentCode
2304462
Title
An SEU-Tolerant Programmable Frequency Divider
Author
Wang, Liang ; Yue, Suge ; Zhao, Yuanfu ; Fan, Long
Author_Institution
Beijing Microelectron. Technol. Inst.
fYear
2007
fDate
26-28 March 2007
Firstpage
899
Lastpage
904
Abstract
A programmable frequency divider, designed to mitigate radiation-induced single event upsets (SEU), is proposed. The circuit is immune to both SEUs from storage circuits and those induced by single event transient (SET) from combinational logic. The SEU immunity of storage element is achieved by constructing the element with a novel SEU-hardened latch which doesn´t need transistor sizing to be functional and SEU-tolerant. SET tolerance is achieved by making full use of the existing parts and producing further necessary redundancies. The proposed structures are implemented and simulated using a standard 0.18mum logic process model. Simulation results show that the proposed frequency divider works correctly when attacked as well as during normal operations, with acceptable area and power overhead
Keywords
combinational circuits; flip-flops; frequency dividers; radiation hardening (electronics); 0.18 micron; SEU-hardened latch; SEU-tolerant; combinational logic; logic process model; programmable frequency divider; radiation-induced single event upsets; single event transient; storage circuits; Capacitance; Circuits; Electronic mail; Flip-flops; Frequency conversion; Latches; Microelectronics; Redundancy; Single event upset; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Quality Electronic Design, 2007. ISQED '07. 8th International Symposium on
Conference_Location
San Jose, CA
Print_ISBN
0-7695-2795-7
Type
conf
DOI
10.1109/ISQED.2007.36
Filename
4149147
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