An O(n)-time standard cell placement algorithm using constrained multi-stage graph model

The authors present an O(n)-time algorithm for standard cell placement on the constrained multistage graph (CMSG) model. The first step of this algorithm performs the row assignment of each cell by converting the circuit connectivity into the CMSG, where each stage of the CMSG corresponds to a cell-row in the final layout. In the second step, called the line sweep method, the position of each cell within the row is determined one by one so that the local channel density is minimized. Experimental results on benchmark circuits have shown that the proposed algorithm yields very competitive results in terms of the number of feedthrough cells and channel density. The results are pertinent to VLSI layout problems.<>