Film redistribution layer technology

This paper describes the design and process for an advanced card technology capable of achieving wiring densities of the order of 500-1000 in/sq. inch. It´s unique features consist of using a photosensitive dielectric (PSD) redistribution layer to produce very small (2-4.0 mil) blind vias, as well as utilizing PCB signal and power planes for global interconnect of fine grid surface mount components (QFPs, SMA, and ICs). The process consists of subtractive etched power cores and/or additively plated signal cores. The subcomposite is completed using conventional PCB processing. The redistribution layer is added sequentially by coating and/or laminating a photosensitive dielectric and photoprocessing the blind vias. The circuitization of the redistribution layer is completed by a full additive plating process and/or electro pattern plating. A solder mask is applied, and Eutectic Solder is electroplated over the surface for component assembly. A key element of the technology that will allow the escape of high I/O components with a dense interconnecting grid (8.0-20.0 mils/200-500 microns), is the utilization of the signal and power planes in the subcomposite structure