• DocumentCode
    2307140
  • Title

    A novel systolic array implementation of DCT, DWT and DFT

  • Author

    Weizhen, M.A.

  • Author_Institution
    Dept. of Radio Eng., South China Univ. of Technol., Guangzhou, China
  • fYear
    1990
  • fDate
    24-27 Sep 1990
  • Firstpage
    211
  • Abstract
    A novel systolic array architecture for computing discrete orthogonal transforms (such as the discrete cosine transform (DCT), the discrete W transform (DWT), or the discrete Fourier transform (DFT)) is proposed. The systolic algorithm is based on the FFCT proposed by Vetterli and Nussbaumer (1984) and the recursive equation of trigonometric functions. The author presents the processing elements based on a special butterfly computation and describes the systolic array implementations for computing DCT, DWT and DFT respectively. All these computations can be fulfilled in the real domain. It is argued that because of a high degree of simplicity, regularity, suitability and concurrency inherent to these designs, their VLSI implementation will be cost effective
  • Keywords
    digital signal processing chips; fast Fourier transforms; systolic arrays; transforms; DCT; DFT; DWT; VLSI; butterfly computation; discrete Fourier transform; discrete W transform; discrete cosine transform; discrete orthogonal transforms; processing elements; recursive equation; systolic array architecture; trigonometric functions; Computer architecture; Concurrent computing; Costs; Discrete Fourier transforms; Discrete cosine transforms; Discrete wavelet transforms; Equations; Fourier transforms; Systolic arrays; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer and Communication Systems, 1990. IEEE TENCON'90., 1990 IEEE Region 10 Conference on
  • Print_ISBN
    0-87942-556-3
  • Type

    conf

  • DOI
    10.1109/TENCON.1990.152601
  • Filename
    152601