Suppressed process-induced damage in N/sub 2/O-annealed SiO/sub 2/ gate dielectrics

Author

Joshi, A.B. ; Hann, R. ; Chung, Lawrence ; Bhat, M. ; Cho, T.H. ; Min, B.W. ; Kwong, D.L.

Author_Institution

Telecommunications, Rockwell Int. Corp., Newport Beach, CA, USA

fYear

1995

fDate

4-6 April 1995

Firstpage

156

Lastpage

161

Abstract

The impact of N/sub 2/O-nitridation of SiO/sub 2/ on gate oxide reliability against plasma damage is investigated here. It is observed that nitridation of thermal oxide significantly enhances the resistance of gate oxide against plasma induced charging. It is also observed that increasing N/sub 2/O nitridation enhances the immunity to plasma damage progressively. An optimum combination of N/sub 2/O anneal temperature and flow-rate can be used to obtain highly reliable gate dielectrics within reasonable thermal budgets. The impact of N/sub 2/O-nitridation of SiO/sub 2/ on gate oxide reliability against plasma.

Keywords

MOS capacitors; MOSFET; annealing; dielectric thin films; integrated circuit reliability; nitridation; nitrogen compounds; semiconductor device reliability; semiconductor-insulator boundaries; silicon compounds; N/sub 2/O; N/sub 2/O-annealed gate dielectrics; Si-SiO/sub 2/; SiNO; SiO/sub 2/ gate dielectrics; anneal temperature; flow-rate; gate oxide reliability; nitridation; plasma damage; plasma induced charging; suppressed process-induced damage; thermal oxide; twin-well CMOS process; Annealing; Dielectrics; Etching; Hot carriers; MOSFET circuits; Plasma applications; Plasma materials processing; Plasma simulation; Plasma temperature; Thermal resistance;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium, 1995. 33rd Annual Proceedings., IEEE International

Conference_Location

Las Vegas, NV

Print_ISBN

0-7803-2031-X

Type

conf

DOI

10.1109/RELPHY.1995.513669

Filename

513669