DocumentCode
2309205
Title
The Melbourne University heterogeneous multiprocessor
Author
Trivellas, Jim ; Forward, Kevin E.
Author_Institution
Dept. of Electr. & Electron. Eng., Melbourne Univ., Parkville, Vic., Australia
fYear
1990
fDate
24-27 Sep 1990
Firstpage
269
Abstract
The Melbourne University heterogeneous multiprocessor is an experimental multiple-input multiple-data (MIMD) multiprocessor with different processing elements and is based on a shared memory architecture. The authors discuss the overall structure of the multiprocessor, and concentrate on the bus arbitration and the synchronization techniques used. Results based on a parallel implementation of the Sieve of Eratosthenes are presented. The results indicate that for a three-processor system, the memory contention is fairly small (even though the processors access the common memory repeatedly), and that the heterogeneous multiprocessor achieves a good speedup over the uniprocessor system (approximately 1.5×) for a small increase in cost
Keywords
multiprocessing systems; parallel architectures; synchronisation; MIMD multiprocessor; Melbourne University heterogeneous multiprocessor; Sieve of Eratosthenes; bus arbitration; memory contention; parallel implementation; shared memory architecture; synchronization; Application software; Circuits; Computer architecture; Concurrent computing; Costs; Microprocessors; Multiprocessing systems; Parallel processing; Partitioning algorithms; Sun;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer and Communication Systems, 1990. IEEE TENCON'90., 1990 IEEE Region 10 Conference on
Print_ISBN
0-87942-556-3
Type
conf
DOI
10.1109/TENCON.1990.152614
Filename
152614
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