Post Silicon Validation of Digital Radio Interfaces

Today, a baseband processor based SoC in the Femtocell domain of devices typically supports a digital radio interface. In an actual system, analog transceivers are connected to these baseband SoCs which are further connected to antennas. Due to complexity of an analog transceiver it is extremely difficult to validate and debug digital radio interfaces. Additionally, this requires complex software and expensive hardware equipment to ensure correct operation. In this paper, we describe a hardware and software methodology that allows for low cost post silicon validation of digital radio interfaces using an FPGA. These techniques helped us achieve the desired post silicon functional coverage that ensured high quality of the designed SoC.