DocumentCode
2309419
Title
Lessons from at-speed scan deployment on an Intel® Itanium® microprocessor
Author
Pant, Pankaj ; Zelman, Joshua ; Colon-Bonet, Glenn ; Flint, Jennifer ; Yurash, Steve
Author_Institution
Intel Corp., Hudson, MA, USA
fYear
2010
fDate
2-4 Nov. 2010
Firstpage
1
Lastpage
8
Abstract
Lessons learnt during the deployment of transition scan content on an Intel® Itanium® server microprocessor design and its use for electrical debug and defect screening in high-volume manufacturing are described. While many publications in the area of transition scan show it being practiced as an efficient defect screening tool, only a minority of these designs were high-performance microprocessor designs. This work illustrates the benefits of such techniques on complex microprocessors.
Keywords
integrated circuit design; microprocessor chips; Intel Itanium microprocessor; at-speed scan deployment; complex microprocessors; defect screening; electrical debug; high-performance microprocessor design; high-volume manufacturing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference (ITC), 2010 IEEE International
Conference_Location
Austin, TX
ISSN
1089-3539
Print_ISBN
978-1-4244-7206-2
Type
conf
DOI
10.1109/TEST.2010.5699256
Filename
5699256
Link To Document