DocumentCode
2309635
Title
Analog neural network design for RF built-in self-test
Author
Maliuk, Dzmitry ; Stratigopoulos, Haralampos-G ; Huang, He ; Makris, Yiorgos
Author_Institution
Electr. Eng. Dept., Yale Univ., New Haven, CT, USA
fYear
2010
fDate
2-4 Nov. 2010
Firstpage
1
Lastpage
10
Abstract
A stand-alone built-in self-test architecture mainly consists of three components: a stimulus generator, measurement acquisition sensors, and a measurement processing mechanism to draw out a straightforward Go/No-Go test decision. In this paper, we discuss the design of a neural network circuit to perform the measurement processing step. In essence, the neural network implements a non-linear classifier which can be trained to map directly sensor-based measurements to the Go/No-Go test decision. The neural network is fabricated as a single chip and is put to the test to recognize faulty from functional RF LNA instances. Its decision is based on the readings of two amplitude detectors that are connected to the input and output ports of the RF LNA. We discuss the learning strategy and the generation of information-rich training sets. It is shown that the hardware neural network has comparable learning capabilities with its software counterpart.
Keywords
built-in self test; low noise amplifiers; neural nets; radiofrequency amplifiers; RF built-in self-test; amplitude detector; analog neural network; functional RF LNA; go/no-go test decision; measurement acquisition sensor; measurement processing mechanism; neural network circuit; nonlinear classifier; sensor-based measurement; stimulus generator;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference (ITC), 2010 IEEE International
Conference_Location
Austin, TX
ISSN
1089-3539
Print_ISBN
978-1-4244-7206-2
Type
conf
DOI
10.1109/TEST.2010.5699272
Filename
5699272
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