Hardware composition with hardware flowcharts and process algebras

Author

Lu, J.-Y.J. ; Kim, Jang Dae ; Chin, Shiu-Kai

Author_Institution

Nat. Semicond. Corp., Santa Clara, CA, USA

fYear

1996

fDate

21-25 Oct 1996

Firstpage

352

Lastpage

364

Abstract

Algorithmic state machine (ASM) descriptions or hardware flowcharts have been used successfully to describe and verify large systems like the IBM 3081. Hardware flowcharts are intuitively appealing in their specification of control flow and data path operations. Nevertheless, previous mechanizations of hardware flowcharts lacked a formal semantics which prevented a rigorous analysis of implementations refined from ASM descriptions, and the ability to equate composed ASM descriptions to purely behavioral descriptions. To address these concerns, we describe an algorithmic register transfer language which has a formal semantics along with an algebra which is used to reason about composed ASM descriptions

Keywords

computer architecture; diagrams; flowcharting; formal logic; formal verification; hardware description languages; logic CAD; process algebra; ASM descriptions; IBM 3081; algorithmic register transfer language; algorithmic state machine descriptions; behavioral descriptions; control flow specification; data path operations; formal semantics; hardware composition; hardware flowcharts; large systems verification; process algebras; Algebra; Algorithm design and analysis; Circuit simulation; Computational modeling; Digital systems; Discrete event simulation; Flowcharts; Hardware; Instruction sets; Transfer functions;

fLanguage

English

Publisher

ieee

Conference_Titel

Engineering of Complex Computer Systems, 1996. Proceedings., Second IEEE International Conference on

Conference_Location

Montreal, Que.

Print_ISBN

0-8186-7614-0

Type

conf

DOI

10.1109/ICECCS.1996.558449

Filename

558449