DocumentCode
2309988
Title
Performance Analysis of Offloading IPsec Processing to Hardware Based Accelerators
Author
Agrawal, Himanshu ; Dutta, Y. ; Malik, S.
Author_Institution
Network Processor Div., Freescale Semicond. Inc., Noida, India
fYear
2012
fDate
19-22 Dec. 2012
Firstpage
291
Lastpage
294
Abstract
Need for Data security over the IP network is raising day by day. One of the security options i.e. IPSec provides security protocols including cipher and authentication to secure network traffic. Algorithms being used in these protocols are highly CPU intensive. Network equipment providers integrate special cryptographic accelerators in SoCs to offload the IPSec processing from CPU. Various level of hardware support is available for IPSec protocol offload, ranging from independent cipher and authentication processing to handling IPSec protocol features in the hardware. This paper covers the comparative analysis of various hardware offload options. The analysis is supported by IPSec protocol offload based implementation and associated test results on one of the Freescale´s QorIQ platforms.
Keywords
IP networks; authorisation; cryptographic protocols; telecommunication traffic; CPU intensive; Freescale QorIQ platforms; IP network; IPSec protocol; SoC; authentication; cipher; cryptographic accelerators; data security; hardware based accelerators; network equipment providers; network traffic; offloading IPsec processing; security protocols; Authentication; IPSec; Security; Symmetric Ciphers;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic System Design (ISED), 2012 International Symposium on
Conference_Location
Kolkata
Print_ISBN
978-1-4673-4704-4
Type
conf
DOI
10.1109/ISED.2012.53
Filename
6526603
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