Title :
High throughput low energy FEC/ARQ technique for short frame turbo codes
Author :
Chi, Zhipei ; Wang, Zhongfeng ; Parhi, Keshab K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA
Abstract :
Protecting short frames using turbo coding is a challenging problem because of the short frame and the need for efficiency. In this paper, first, a scalable and easily implementable interleaver design is proposed since good random interleavers for long frame turbo codes are not guaranteed to perform well for short frames. Second, an efficient tail-biting encoding/decoding scheme is proposed, which does not sacrifice performance but significantly increases the throughput of the decoding process compared with existing methods. Finally, a novel error detection method, taking advantage a set of decoding metrics (DMs), is developed to reduce the number of cyclic redundancy check (CRC) bits used for error detection. The total savings is up to 12% for the transmission throughput and 21.5% for the energy consumption of the turbo decoder when a frame size of 49 is used
Keywords :
automatic repeat request; decoding; error detection codes; error statistics; forward error correction; interleaved codes; protocols; turbo codes; ARQ protocols; BER; CRC; VLSI implementation; bit error rate; cyclic redundancy check bits reduction; decoding metrics; energy consumption; error detection method; frame size; high throughput FEC/ARQ; low energy FEC/ARQ; scalable interleaver design; short frame turbo codes; tail-biting encoding/decoding; transmission throughput; turbo coding; turbo decoder; AWGN; Additive white noise; Automatic repeat request; Bit error rate; Cyclic redundancy check; Decoding; Protection; Throughput; Turbo codes; Very large scale integration;
Conference_Titel :
Acoustics, Speech, and Signal Processing, 2000. ICASSP '00. Proceedings. 2000 IEEE International Conference on
Conference_Location :
Istanbul
Print_ISBN :
0-7803-6293-4
DOI :
10.1109/ICASSP.2000.861020