Title :
ATCA control system hardware for the plasma vertical stabilization in the JET tokamak
Author :
Batista, A.J.N. ; Neto, A. ; Correia, M. ; Fernandes, A.M. ; Carvalho, B.B. ; Fortunato, J.C. ; Sousa, J. ; Varandas, C.A.F. ; Sartori, F. ; Jennison, M.
Author_Institution :
IST Inst. de Plasmas e Fusao Nucl., Associacao EURATOM, Lisbon, Portugal
Abstract :
A multi-input-multi-output controller for the plasma vertical stabilization was implemented and installed on the Joint European Torus Tokamak. The system can attain a control-cycle time of approximately 30 mus using times86 multi-core processors but targets 10 mus via field programmable gate array (FPGA) based processing. The hardware, complying with the advanced telecommunications computing architecture (ATCA) standard, was in-house designed and implemented to achieve the required performance and consists of: a total of 6 synchronized ATCA control boards, each one with 32 analog input channels which provide up to 192 galvanically-isolated channels, used mainly for magnetic measurements. Each board contains an FPGA, which performs digital signal processing and includes a PCI express communications interface; an ATCA rear transition module, which comprises up to 8 galvanically-isolated analog output channels to control the fast radial field amplifier (plusmn10 kV, plusmn2.5 kA). An optical link to digitally control the enhanced radial field amplifier (plusmn12 kV, plusmn5 kA). Up to 8 EIA-485 digital inputs for timing and monitoring information; An ATCA processor blade with a quad-core processor, where the control algorithm is presently running, connected to the 6 ATCA control boards through the PCI express interface. All FPGAs are interconnected by low-latency links via the ATCA full-mesh backplane, allowing all channel data to be available on each FPGA running an upcoming distributed control algorithm.
Keywords :
MIMO systems; Tokamak devices; digital control; digital signal processing chips; distributed algorithms; distributed control; field programmable gate arrays; fusion reactor operation; fusion reactor targets; multiprocessing systems; nuclear engineering computing; optical fibre amplifiers; peripheral interfaces; physical instrumentation control; stability; ATCA control system hardware; FPGA; JET Tokamak; Joint European Torus; PCI express communication interface; advanced telecommunications computing architecture standard; analog input channel; digital control; digital signal processing; distributed control algorithm; fast radial field amplifier; field programmable gate array; full-mesh backplane; fusion reactor target; galvanically-isolated analog output channel; low-latency link; magnetic measurement; multiinput multioutput controller; optical link; plasma vertical stabilization; quadcore processor; rear transition module; times86 multicore processor; Communication system control; Control systems; Field programmable gate arrays; Galvanizing; Hardware; Optical amplifiers; Plasmas; Signal processing algorithms; Telecommunication control; Tokamaks; ATCA; Control systems; Field programmable gate arrays; Real time systems;
Conference_Titel :
Real Time Conference, 2009. RT '09. 16th IEEE-NPSS
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-4454-0
DOI :
10.1109/RTC.2009.5321967