DocumentCode :
2310883
Title :
Adaptive systems on a chip (aSoC) for low-power signal processing
Author :
Laffely, Andrew ; Liang, Jian ; Jain, Prashant ; Burleson, Wayne ; Tessier, Russell
Author_Institution :
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
Volume :
2
fYear :
2001
fDate :
4-7 Nov. 2001
Firstpage :
1217
Abstract :
Adaptive system-on-a-chip, aSoC, is an on-chip communications architecture designed to promote scalability and flexibility in system-on-a-chip designs. This paper describes the use of aSoC to allow for dynamic power management of video signal processing systems. Content variation and perceptual tolerance in video signals can be exploited to trade quality for low power gracefully. The regularity and flexibility of the aSoC architecture provides a predictable framework for modeling the power, speed and area requirements of global communications that dominate configurable video processing.
Keywords :
VLSI; adaptive systems; digital signal processing chips; integrated circuit design; power consumption; power control; telecommunication control; video equipment; video signal processing; VLSI; adaptive system-on-a-chip; communications architecture; content variation; dynamic power management; low-power signal processing; perceptual tolerance; power consumption; video signal processing; wireless video processing; Adaptive signal processing; Adaptive systems; Energy management; Global communication; Power system management; Power system modeling; Predictive models; Scalability; System-on-a-chip; Video signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers, 2001. Conference Record of the Thirty-Fifth Asilomar Conference on
Conference_Location :
Pacific Grove, CA, USA
ISSN :
1058-6393
Print_ISBN :
0-7803-7147-X
Type :
conf
DOI :
10.1109/ACSSC.2001.987684
Filename :
987684
Link To Document :
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