CMOS amplifiers incorporating a novel slew rate enhancement technique

Author

Nagaraj, K.

Author_Institution

AT&T Bell Lab., Murray Hill, NJ, USA

fYear

1990

fDate

13-16 May 1990

Abstract

A novel technique for enhancing the slew rate in CMOS amplifiers is described. The enhancement is provided by an auxiliary circuit which is automatically activated during transients. The main amplifier is not stressed with large currents, thus minimizing power dissipation and avoiding signal swing problems. This technique is quite generic, and can be applied to a variety of amplifier structures. An experimental operational transconductance amplifier incorporating this technique has been fabricated. A slew rate of 1 V/μs with a 10000 pF load capacitance has been achieved, while requiring a quiescent power dissipation of less than 1.5 mW

Keywords

CMOS integrated circuits; driver circuits; integrated circuit technology; operational amplifiers; 1.5 mW; 10 nF; CMOS amplifiers; activated during transients; auxiliary circuit; high slew rate amplifiers; load capacitance; minimizing power dissipation; operational transconductance amplifier; quiescent power dissipation; slew rate; slew rate enhancement technique; Analog integrated circuits; Broadband amplifiers; CMOS analog integrated circuits; CMOS integrated circuits; Capacitance; Operational amplifiers; Power amplifiers; Power dissipation; Transconductance; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1990., Proceedings of the IEEE 1990

Conference_Location

Boston, MA

Type

conf

DOI

10.1109/CICC.1990.124714

Filename

124714