Title :
On-Chip processing for the wave union TDC implemented in FPGA
Author_Institution :
Fermi Nat. Accel. Lab., Batavia, IL, USA
Abstract :
The wave union TDC implemented in FPGA utilizes multiple measurement method to reach time resolution beyond the natural carry cell delay in FPGA. Lacking of analog compensation for bin width control available in ASIC, the wave union TDC takes the after-fact digital calibration approach. In addition to the temperature drift, non-uniformity of the carry chain structure in FPGA causes complicate differential non-linearity pattern which imposes significant on-chip calibration challenge. In this paper, processing strategies for the wave union TDC are discussed. Actual implementations in low-cost FPGA with 20 ps and 10 ps RMS resolutions are also presented.
Keywords :
analogue-digital conversion; application specific integrated circuits; calibration; field programmable gate arrays; ASIC; FPGA; RMS resolutions; after-fact digital calibration approach; analog compensation; bin width control; carry chain structure nonuniformity; differential nonlinearity pattern; natural carry cell delay; on-chip calibration challenge; on-chip processing; temperature drift; time 10 ps; time 20 ps; time-to-digital conversion; wave union TDC implementation; Calibration; Delay effects; Feedback; Field programmable gate arrays; Finite impulse response filter; Linear systems; Logic; Propagation delay; Pulse generation; Testing; FPGA Firmware; Front End Electronics; TDC;
Conference_Titel :
Real Time Conference, 2009. RT '09. 16th IEEE-NPSS
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-4454-0
DOI :
10.1109/RTC.2009.5322002
