Title :
FPGA power efficient inverse lifting wavelet IP
Author :
Grangetto, Marco ; Martina, Maurizio ; Masera, Guido ; Piccinini, Gianluca ; Vacca, Fabrizio ; Zamboni, Maurizio
Author_Institution :
Dipt. di Elettronica, Politecnico di Torino, Italy
Abstract :
In this paper a power efficient lifting-based wavelet transform IP, well suited for mobile and tetherless applications, is proposed. Recently, reconfigurable architectures, driven by new communication technology challenges and by mobile market explosion have moved developers´ interest towards novel IP design strategies. Despite the increasing importance gathered by easily retargetable blocks, a lack of power conscious cores is felt by the developer´s community. This IP is intended to be employed as the source coding kernel in many multimedia emerging algorithms. From post-place and route simulation a power dissipation of 36.6 mW has been obtained on a Xilinx XCV200E.
Keywords :
digital signal processing chips; discrete wavelet transforms; field programmable gate arrays; mobile radio; multimedia communication; reconfigurable architectures; source coding; wavelet transforms; 36.6 mW; FPGA; Xilinx XCV200E; inverse lifting wavelet IP; mobile communication; multimedia algorithms; power dissipation; reconfigurable architectures; source coding kernel; Communications technology; Discrete wavelet transforms; Explosions; Field programmable gate arrays; Hardware; Laser sintering; Reconfigurable architectures; Source coding; Transform coding; Wavelet transforms;
Conference_Titel :
Signals, Systems and Computers, 2001. Conference Record of the Thirty-Fifth Asilomar Conference on
Conference_Location :
Pacific Grove, CA, USA
Print_ISBN :
0-7803-7147-X
DOI :
10.1109/ACSSC.2001.987706
