Mixed DSP/FPGA implementation of an error-resilient image transmission system based on JPEG2000

This paper describes a demonstrator of an error-resilient image communication system over wireless packet networks, based on the novel JPEG2000 standard. In particular, the decoder implementation is addressed, which is the most critical task in terms of complexity and power consumption, in view of use on a wireless portable terminal for cellular applications. The system implementation is based on a mixed DSP/FPGA architecture, which allows us to parallelize some computational tasks, thus leading to efficient system operation.