Title :
Packaging technologies for 3D integration
Author :
Collander, Paul ; Katzko, Chris ; Gaborieau, Olivier
Author_Institution :
Poltronic Ltd., Espoo, Finland
Abstract :
As electronics manufacturing is now starting to utilize the 3rd dimension there are two very different approaches: 3D Silicon in wafer fabrication and 3D Packaging using a lot of existing and new technologies. This paper tries to show that there are almost unlimited opportunities for different packaging technologies for 2.5 and 3D. For optimal results both the semiconductor industry and the packaging technology industry need to collaborate. The authors have been involved in Multichip Module technology development for 2-3 decades but the real 3rd dimension is starting to be utilized only now. As 3D Packaging involves a lot of different technologies in combination a lot of consortia are proving the most effective means to develop this technology. Each player needs to get his suppliers and customers lined up in a compatible way to establish 3D technology supply chain and this is easiest in a focused consortium. One such consortium is the High Density Packaging User Group composed of global OEMs and many of their different suppliers on different layers, from materials to component and board suppliers to EMS up to OEMs. A couple of 3D Packaging projects are currently in planning in order to match needs and capabilities and thereafter test high speed performance and reliability. The consortium is working with in-kind services for each manufacturing step in a real learning-by-doing environment. All participants do have a joint interest in getting their part of the chain streamlined in and generally accepted. Qualification is then easier to perform in a direct business manner and the result of qualification is almost secured in advance.
Keywords :
electronics packaging; integrated circuit manufacture; silicon; three-dimensional integrated circuits; 3D integration; 3D packaging; 3D silicon; electronics manufacturing; multichip module technology; packaging technology; wafer fabrication; Packaging; Silicon; Supply chains; Three dimensional displays; Through-silicon vias;
Conference_Titel :
Microsystems Packaging Assembly and Circuits Technology Conference (IMPACT), 2010 5th International
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-9783-6
Electronic_ISBN :
2150-5934
DOI :
10.1109/IMPACT.2010.5699491