High-performance FFT processing using reconfigurable logic

The fast Fourier transform (FFT) and its inverse (IFFT) are two of the most widely used building blocks in digital signal processing designs. A novel structure for a radix-4 type FFT is proposed which can process frames of 16-bit complex samples at a rate of one output sample per 100 MHz clock cycle, thus performing a 1024-point transform in approximately 10 /spl mu/s. The dedicated, parallel multiplier and distributed block memory features of the Virtex/sup /spl reg//-II FPGA family provide the designer with a single chip solution where external components such as memory are not required.