مرکز منطقه ای اطلاع رساني علوم و فناوري - Achievement and future challenges in 3D researches

Keywords :

bonding processes; capacitance; chemical vapour deposition; etching; integrated circuit packaging; laser beam machining; polymers; thermal management (packaging); three-dimensional integrated circuits; transmission lines; 3D integration; 3D researches; 3D technology; 3D-optochip; CVD oxide; Cu TSV filling; TSV-based transmission lines; air gap TSV; backside via; bottom-up plating; chip-size SiP; copper bulging; critical etching control; die-wafer bonding; epifilm bonding; face-to-face bonding; gap analysis; gold stud bump; insulation material; laser drilling; low-cost TSV filling electroless Ni plating; non-3D wafer level package; parasitic capacitance; polymers; silicon interposer; thermal enhancement; thermal oxide; thin wafer handling; thin wafer handling- laser debonding; via formation; wafer-level packaging; wireless I-O; Bonding; Gallium arsenide; Heat transfer; Performance evaluation; Three dimensional displays; Through-silicon vias;