Title :
Design, implementation, and test for a 3D-IC many-core processor
Author :
Lee, Hsien-Hsin S.
Keywords :
design for testability; energy consumption; integrated circuit design; integrated circuit testing; microprocessor chips; three-dimensional integrated circuits; 3D integration; 3D stacked architecture physical design; 3D-IC many-core processor; 3D-MAPS fabrication; 3D-MAPS prototyping; Georgia Tech; design for testability; energy consumption; latency; research scope; wirelength reduction; Delay; Optical devices; Radio frequency; Random access memory; System-on-a-chip; Wire;
Conference_Titel :
Microsystems Packaging Assembly and Circuits Technology Conference (IMPACT), 2010 5th International
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-9783-6
Electronic_ISBN :
2150-5934
DOI :
10.1109/IMPACT.2010.5699501
