2311400

Advanced solutions for 3D integration of heterogeneous individual chips

Poupon, G.

2010

20-22 Oct. 2010

1

50

bonding processes; fine-pitch technology; integrated circuit interconnections; system-on-chip; three-dimensional integrated circuits; wafer level packaging; 3D integration; 3D wafer level packaging; CIWIS process; SOC; active silicon interposer; chip in wafer for integrated system; conference presentation; direct bonding techniques; embedded chip technology; embedded wafer level packaging; fine pitch TSV; heterogeneous individual chips; high density TSV; high density interconnects; molecular bonding; packaging trends; silicon interposer technology; silicon mother board; via belt technology; Copper; Face; Micromechanical devices; Silicon; System-on-a-chip; Three dimensional displays; Through-silicon vias;

English

ieee

Microsystems Packaging Assembly and Circuits Technology Conference (IMPACT), 2010 5th International

Taipei

2150-5934

978-1-4244-9783-6

2150-5934

conf

10.1109/IMPACT.2010.5699502

5699502