DocumentCode :
2311411
Title :
Validating UML Statechart-Based Assertions Libraries for Improved Reliability and Assurance
Author :
Drusinsky, Doron ; Michael, James B. ; Otani, Thomas W. ; Shing, Man-Tak
Author_Institution :
Dept. of Comput. Sci., Naval Postgrad. Sch., Monterey, CA
fYear :
2008
fDate :
14-17 July 2008
Firstpage :
47
Lastpage :
51
Abstract :
In this paper we present a new approach for developing libraries of temporal formal specifications. Our approach is novel in its use of UML statechart-based assertions for formal specifications and its emphasis on validation testing, including an emphasis on the inclusion of validation test scenarios as an integral part of a formal specification library. Validation test scenarios are needed to ensure a robust validation process and to improve the reliability and assurance of the specification and resulting software.
Keywords :
Unified Modeling Language; program testing; program verification; software libraries; software reliability; UML statechart-based assertions libraries; robust validation process; temporal formal specifications; validation testing; Formal specifications; Government; Logic; Natural languages; Power system modeling; Power system reliability; Software libraries; Switches; Testing; Unified modeling language; Assertions; Formal Specifications; Patterns; Statecharts; Validation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Secure System Integration and Reliability Improvement, 2008. SSIRI '08. Second International Conference on
Conference_Location :
Yokohama
Print_ISBN :
978-0-7695-3266-0
Electronic_ISBN :
978-0-7695-3266-0
Type :
conf
DOI :
10.1109/SSIRI.2008.54
Filename :
4579793
Link To Document :
بازگشت