DocumentCode
2311805
Title
Massively Parallel Network Coding on GPUs
Author
Chu, Xiaowen ; Zhao, Kaiyong ; Wang, Mea
Author_Institution
Dept. of Comput. Sci., Hong Kong Baptist Univ., Hong Kong
fYear
2008
fDate
7-9 Dec. 2008
Firstpage
144
Lastpage
151
Abstract
Network coding has recently been widely applied in various networks for system throughput improvement and/or resilience to network dynamics. However, the computational overhead introduced by the network coding operations is not negligible and has become the cornerstone for real deployment of network coding. In this paper, we exploit the computing power of contemporary Graphic Processing Units (GPUs) to accelerate the network coding operations. We proposed three parallel algorithms that maximize the parallelism of the encoding and decoding processes, i.e., the power of GPUs is fully utilized. This paper also shares our optimization design choices and our workarounds to the challenges encountered in working with GPUs. With our implementation of the algorithms, we are able to achieve up to 12 times of speedup over the highly optimized CPU counterpart, using the NVIDIA GPU and the Computer Unified Device Architecture (CUDA) programming model.
Keywords
microprocessor chips; parallel algorithms; NVIDIA GPU; computer unified device architecture programming; graphic processing units; massively parallel network coding; parallel algorithms; system throughput improvement; Acceleration; Computer networks; Decoding; Encoding; Graphics; Network coding; Parallel algorithms; Parallel processing; Resilience; Throughput; CUDA; GPU computing; Network coding;
fLanguage
English
Publisher
ieee
Conference_Titel
Performance, Computing and Communications Conference, 2008. IPCCC 2008. IEEE International
Conference_Location
Austin, Texas
ISSN
1097-2641
Print_ISBN
978-1-4244-3368-1
Electronic_ISBN
1097-2641
Type
conf
DOI
10.1109/PCCC.2008.4745113
Filename
4745113
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