DocumentCode
2311833
Title
An Adaptive Cache Management Using Dual LRU Stacks to Improve Buffer Cache Performance
Author
Wan, Shenggang ; Cao, Qiang ; He, Xubin ; Xie, Changsheng ; Wu, Chentao
Author_Institution
Data Storage Div., Huazhong Univ. of Sci. & Technol., Wuhan
fYear
2008
fDate
7-9 Dec. 2008
Firstpage
43
Lastpage
50
Abstract
Cache plays an essential role in modern computer systems to smooth the performance gap between memory and CPU. Most existing cache replacement algorithms use three stacks: recency stack, frequency stack and history stack. The balance and design of those stacks is a key to achieve high hit ratio, thus improving the buffer cache efficiency. In this paper we propose a new cache replacement algorithm, adaptive dual LRU, or AD-LRU for short, to efficiently utilize the buffer cache pages. Instead of using one LRU stack, we use two LRU stacks: one LRU stack LR to catch the accesses of pages with low recency, and the other LRU stack HR to catch the accesses of pages with high recency. The idea is to adaptively adjust the sizes of the history stack, recency and frequency stacks, an overall buffer cache efficiency in terms of hit ratio will be improved. Simulations results show that AD-LRU demonstrates higher hit ratio compared to existing popular algorithms such as LRU, ARC, and LIRS.
Keywords
cache storage; adaptive cache management; buffer cache; cache replacement algorithms; frequency stack; history stack; recency stack; Buffer storage; Computational modeling; Data engineering; Engineering management; Frequency; History; Memory management; Technology management; Buffer cache; LRU; frequency stack; history stack; recency stack;
fLanguage
English
Publisher
ieee
Conference_Titel
Performance, Computing and Communications Conference, 2008. IPCCC 2008. IEEE International
Conference_Location
Austin, Texas
ISSN
1097-2641
Print_ISBN
978-1-4244-3368-1
Electronic_ISBN
1097-2641
Type
conf
DOI
10.1109/PCCC.2008.4745115
Filename
4745115
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