DocumentCode :
2311869
Title :
A low-power low-noise CMOS compatible 80 V subscriber line interface circuit
Author :
Moons, Elve ; Willcox, E. ; Op de Beek, E. ; Guebels, Pierre
Author_Institution :
Alcatel Bell Telephone Manuf. Co., Antwerp, Belgium
fYear :
1990
fDate :
13-16 May 1990
Abstract :
The design of a monolithic enhanced subscriber line interface circuit (ESLIC) is reported. Special care has been taken in the realization of the SLIC to achieve a low-power dissipation in both on-hook (70 mW) and off-hook (130 mW) line conditions. The intrinsic noise of the internal circuitry and the noise due to the exchange battery have been drastically reduced to achieve a total receive noise of -85 dBmp. The 80 V circuit covers all loop lengths for a widely variable exchange battery. The LSI is developed as an universal and flexible circuit using a 100 V 4 μm merged bipolar, CMOS, DMOS technology (BCD). The LSI meets very stringent requirements on several specifications
Keywords :
BIMOS integrated circuits; large scale integration; power integrated circuits; subscriber loops; 130 mW; 4 micron; 70 mW; 80 to 100 V; BCD technology; BCDMOS; CMOS compatible; ESLIC; LSI; SLIC; enhanced subscriber line interface circuit; intrinsic noise; low-noise; low-power; low-power dissipation; off-hook line condition; on-hook line condition; requirements; specifications; subscriber line interface circuit; total receive noise; widely variable exchange battery; Batteries; CMOS technology; Circuit noise; Digital relays; Driver circuits; Impedance; Large scale integration; Noise reduction; Resistors; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1990., Proceedings of the IEEE 1990
Conference_Location :
Boston, MA
Type :
conf
DOI :
10.1109/CICC.1990.124720
Filename :
124720
Link To Document :
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