Multiple hardware-acceleration platforms for the full-wave analysis of circuits

Multiple hardware-acceleration platforms for the full-wave analysis of circuits was presented in this paper. The authors seek to alleviate the well-known computational bottleneck of the Arnoldi-based iterative kernels, such as conjugate gradients (CG) and generalized minimal residuals (GMRES), in an effort to provide tremendous performance gains compared to the respective software implementation. The matrix-vector product operation required at each iteration in the construction of the Krylov subspace, which is the main bottleneck, is the target operation for these acceleration platforms.