• DocumentCode
    2312053
  • Title

    An Experimental Study on Latch Up Failure of CMOS LSI

  • Author

    Kohinata, Hideo ; Arai, Masayuki ; Fukumoto, Satoshi

  • Author_Institution
    Tokyo Metropolitan Univ., Hino
  • fYear
    2008
  • fDate
    14-17 July 2008
  • Firstpage
    215
  • Lastpage
    216
  • Abstract
    As the CMOS LSI advances, ESD/latch-up problem is becoming more serious problem as a weakness of CMOS LSI structure. For the first step of our research, we analyze ESD/latch-up fault with actual measurement data in order to cope with this problem.
  • Keywords
    CMOS integrated circuits; electrostatic discharge; large scale integration; CMOS LSI; ESD; latch up failures; measurement data; CMOS process; Costs; Current supplies; Electrostatic discharge; Failure analysis; Large scale integration; Pins; Power supplies; Resistors; Switching circuits; CMOS LSI; latch up;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Secure System Integration and Reliability Improvement, 2008. SSIRI '08. Second International Conference on
  • Conference_Location
    Yokohama
  • Print_ISBN
    978-0-7695-3266-0
  • Electronic_ISBN
    978-0-7695-3266-0
  • Type

    conf

  • DOI
    10.1109/SSIRI.2008.28
  • Filename
    4579831
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2312053