Title :
An Experimental Study on Latch Up Failure of CMOS LSI
Author :
Kohinata, Hideo ; Arai, Masayuki ; Fukumoto, Satoshi
Author_Institution :
Tokyo Metropolitan Univ., Hino
Abstract :
As the CMOS LSI advances, ESD/latch-up problem is becoming more serious problem as a weakness of CMOS LSI structure. For the first step of our research, we analyze ESD/latch-up fault with actual measurement data in order to cope with this problem.
Keywords :
CMOS integrated circuits; electrostatic discharge; large scale integration; CMOS LSI; ESD; latch up failures; measurement data; CMOS process; Costs; Current supplies; Electrostatic discharge; Failure analysis; Large scale integration; Pins; Power supplies; Resistors; Switching circuits; CMOS LSI; latch up;
Conference_Titel :
Secure System Integration and Reliability Improvement, 2008. SSIRI '08. Second International Conference on
Conference_Location :
Yokohama
Print_ISBN :
978-0-7695-3266-0
Electronic_ISBN :
978-0-7695-3266-0
DOI :
10.1109/SSIRI.2008.28
