DocumentCode
2312080
Title
Case study: Detecting hardware Trojans in third-party digital IP cores
Author
Zhang, Xuehui ; Tehranipoor, Mohammad
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Connecticut, Storrs, CT, USA
fYear
2011
fDate
5-6 June 2011
Firstpage
67
Lastpage
70
Abstract
The intellectual property (IP) blocks are designed by hundreds of IP vendors distributed across the world. Such IPs cannot be assumed trusted as hardware Trojans can be maliciously inserted into them and could be used in military, financial and other critical applications. It is extremely difficult to detect Trojans in third-party IPs (3PIPs) simply with conventional verification methods as well as methods developed for detecting Trojans in fabricated ICs. This paper first discusses the difficulties to detect Trojans in 3PIPs. Then a complementary flow is presented to verify the presence of Trojans in 3PIPs by identifying suspicious signals (SS) with formal verification, coverage analysis, removing redundant circuit, sequential automatic test pattern generation (ATPG), and equivalence theorems. Experimental results, shown in the paper for detecting many Trojans inserted into RS232 circuit, demonstrate the efficiency of the flow.
Keywords
automatic test pattern generation; formal verification; integrated circuits; coverage analysis; equivalence theorem; formal verification; hardware trojans; intellectual property blocks; redundant circuit; sequential automatic test pattern generation; suspicious signals; third-party digital IP cores; Automatic test pattern generation; Benchmark testing; Circuit faults; Hardware; Logic gates; Measurement; Trojan horses;
fLanguage
English
Publisher
ieee
Conference_Titel
Hardware-Oriented Security and Trust (HOST), 2011 IEEE International Symposium on
Conference_Location
San Diego CA
Print_ISBN
978-1-4577-1059-9
Type
conf
DOI
10.1109/HST.2011.5954998
Filename
5954998
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