Title :
Optimization of series resistance in sub-0.2 /spl mu/m SOI MOSFETs
Author :
Su, L.T. ; Sherony, M.J. ; Hang Hu ; Chung, J.E. ; Antoniadis, D.A.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA
Abstract :
The optimization of device series resistance in ultra-thin film SOI devices is studied through 2-D simulations and process experiments. To achieve low series resistance, very thin silicides that do not fully consume the SOI film are needed. A novel cobalt salicidation technology using titanium/cobalt laminates is used to demonstrate sub-0.2 /spl mu/m, thin-film SOI devices with excellent performance and very low device series resistance.<>
Keywords :
insulated gate field effect transistors; metallisation; semiconductor device models; semiconductor technology; semiconductor-insulator boundaries; silicon; 0.2 micron; 2D simulations; CoSi/sub 2/; CoSi/sub 2/ silicide; SOI MOSFETs; cobalt salicidation technology; series resistance; silicides; titanium/cobalt laminates; ultra-thin film SOI devices; Cobalt; Contact resistance; Electric resistance; Immune system; Laminates; MOSFETs; Medical simulation; Semiconductor films; Silicides; Silicon on insulator technology;
Conference_Titel :
Electron Devices Meeting, 1993. IEDM '93. Technical Digest., International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-1450-6
DOI :
10.1109/IEDM.1993.347211
