Monolithic integration of III/V devices on Si(001)

Summary form only given. Integration of active III/V devices on Silicon substrates would tremendously increase the functionality of this semiconductor material. In order to realize true monolithic integration, a defect-free nucleation layer is of outmost importance. As CMOS industry nowadays focuses on exactly oriented (001) Si substrates, the integration of a III/V semiconductor based device structure, employing either lattice relaxed III/V layers for high electron mobility devices or the pseudomorphically strained, active direct-band gap material Ga(NAsP) for optic devices, also has to be pursued on this substrate type. High-efficiency, Si-based solar cells can however also be deposited on off-cut substrates. The III/V nucleation layer we use is GaP-based due to the similar lattice constants of GaP and Si. Besides the known challenges of III/V on IV heteroepitaxy, like charge neutrality of the interface, cross-diffusion of dopants and slight differences in lattice constant and thermal expansion coefficient, nucleation on Si furthermore poses the challenge of the formation of antiphase domains. These form as the Si surface is covered with monoatomar steps. This presentation will summarize our current knowledge on the nucleation of III/V semiconductors on Silicon substrates. A specific focus will be on the avoidance of defects as well as on the atomic structure of the GaP/Si interface. Moreover, we will address the successful pseudomorphic integration of a Ga(NAsP)-based laser on this template.