ULSI technology development by predictive simulations

Author

Pinto, M.R. ; Rafferty, C.S. ; Smith, R.K. ; Bude, J.

Author_Institution

AT&T Bell Labs., Murray Hill, NJ, USA

fYear

1993

fDate

5-8 Dec. 1993

Firstpage

701

Lastpage

704

Abstract

Integrated semiconductor process and device simulation that is built on physically sound principles and powerful numerical algorithms should be capable of predicting most aspects of IC performance in minutes to hours, based only on process recipes as input. A system is discussed which we believe approaches this ideal for technologies into the 0.1 /spl mu/m regime. Examples cited include intrinsic MOSFET/bipolar modeling, parasitic characterization, novel device analysis and automated design optimization.<>

Keywords

VLSI; digital simulation; electronic engineering computing; monolithic integrated circuits; semiconductor device models; semiconductor process modelling; simulation; 0.1 micron; IC performance; ULSI technology development; automated design optimization; device analysis; integrated semiconductor process/device simulation; parasitic characterization; predictive simulations; Costs; Design optimization; FETs; Geometry; Power system modeling; Predictive models; Semiconductor process modeling; Solid modeling; Tunneling; Ultra large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1993. IEDM '93. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-1450-6

Type

conf

DOI

10.1109/IEDM.1993.347216

Filename

347216