DocumentCode
2312628
Title
A High-Speed Scheduling Algorithm for Combined Input-Crosspoint-Queued (CICQ) Switches
Author
Yi, Peng ; Li, Yufeng ; Hu, Hongchao ; Wang, Binqiang
Author_Institution
Nat. Digital Switching Syst. Eng. & Technol. R&D Center
fYear
2006
fDate
25-27 Oct. 2006
Firstpage
1
Lastpage
5
Abstract
With the development of ASIC technology, buffered crossbar is very popular for building switch architecture nowadays. This makes the combined input-crosspoint-queued (CICQ) switch a more attractive solution than the traditional input-queued (IQ) switch because of the simplicity of the CICQ switch scheduling. Recently, many distributed scheduling policies have been proposed based on this architecture. However, the existing schemes still require quite a bit of hardware or timing complexity to obtain good performance. In this paper, we propose an earliest state-reversed buffer first (ESRBF) scheme, and prove that it achieves 100% throughput for any admissible traffic that satisfies the strong law of large numbers (SLLN). The ESRBF algorithm is based only on the state information of the crosspoint buffer and has a time complexity of O(log N). The simulation results also verify a good performance of the ESRBF scheme
Keywords
queueing theory; scheduling; telecommunication switching; telecommunication traffic; CICQ; ESRBF; admissible traffic; combined input-crosspoint-queued switches; earliest state-reversed buffer first; high-speed scheduling algorithm; strong law of large numbers; Buffer storage; Fabrics; Hardware; Iterative algorithms; Packet switching; Round robin; Scheduling algorithm; Switches; Throughput; Traffic control;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications and Networking in China, 2006. ChinaCom '06. First International Conference on
Conference_Location
Beijing
Print_ISBN
1-4244-0463-0
Electronic_ISBN
1-4244-0463-0
Type
conf
DOI
10.1109/CHINACOM.2006.344810
Filename
4149775
Link To Document