DocumentCode :
2312735
Title :
Multilevel planarized-trench-aluminum (PTA) interconnection using reflow sputtering and chemical mechanical polishing
Author :
Kikuta, K. ; Nakajima, T. ; Ueno, K. ; Kikkawa, T.
Author_Institution :
ULSI Device Dev. Labs., USA
fYear :
1993
fDate :
5-8 Dec. 1993
Firstpage :
285
Lastpage :
288
Abstract :
A multilevel planarized-trench-aluminum (PTA) interconnection is developed using reflow sputtering and chemical mechanical polishing (CMP). This new PTA interconnection technology has the advantages both for a simple process using only Al reflow sputtering for simultaneous via and trench filling and subsequent CMP, and for high reliability in the interconnection due to the use of reflow sputtering. A double-level PTA interconnection demonstrates 4 times lower via resistance and 9 times longer electromigration lifetimes in both wiring and vias than conventional interconnections.<>
Keywords :
aluminium; circuit reliability; electromigration; integrated circuit technology; metallisation; polishing; sputter deposition; Al; chemical mechanical polishing; double-level interconnection; electromigration lifetimes; multilevel planarized-trench-Al interconnection; reflow sputtering; reliability; submicron technology; vias; wiring; Collimators; Dielectrics; Electric resistance; Electromigration; Filling; Laboratories; Planarization; Sputtering; Surface resistance; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1993. IEDM '93. Technical Digest., International
Conference_Location :
Washington, DC, USA
ISSN :
0163-1918
Print_ISBN :
0-7803-1450-6
Type :
conf
DOI :
10.1109/IEDM.1993.347240
Filename :
347240
Link To Document :
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