Application-specific instruction design for LNS addition/subtraction computation on an SOPC system

LNS arithmetic can achieve high performance in some specific applications that involve a lot of complex functions and/or consecutive multiplications and divisions. We proposed that application-specific instruction design for LNS addition/subtraction computation is implemented on an Altera Nios-II SOPC system. The direct-computation of LNS addition/subtraction is executed by three custom instructions of the SOPC system. Among the three instructions, the exponential and logarithmic instructions can also be used to perform the LNS-to-FLP and FLP-to-LNS conversions, respectively. Thus, the hardware cost of the custom logic is reduced. We also designed a special multiply-shift custom instruction to facilitate the computation of the A^B function in both the FLP and LNS format. Our experimental results show that the speed of the A^B computation in LNS arithmetic is almost three times faster than that in FLP arithmetic. Furthermore, the speed of the A^B computation in LNS arithmetic by using our proposed specific instruction design approach is at least ten times faster than the speed of computation implemented by software. We thus conclude that the proposed application-specific instruction approach is effective for high-speed implementation of some specific applications.