One-decade reduction of pn-junction leakage current using poly-Si interlayered SOI structures

Author

Horiuchi, M. ; Ohoyu, K.

Author_Institution

Central Res. Lab., Hitachi Ltd., Tokyo, Japan

fYear

1993

fDate

5-8 Dec. 1993

Firstpage

847

Lastpage

850

Abstract

Silicon on insulator (SOI) structures were fabricated by using direct bonding technology to bury multilayered films consisting of poly-Si, Si/sub 3/N/sub 4/, and SiO/sub 2/. The structures were analyzed using SIMS, micro-Raman spectroscopy, and spreading resistance methods. Both the area component and the perimeter component of the pn-junction leakage current was reduced more than 10-fold in the structures that had a poly-Si interlayer just beneath the active devices to act as a gettering site. The leakage current was a function of tensile strength in the SOI layer and was easily controlled by a suitable combination of interlayered insulators.<>

Keywords

Raman spectra of inorganic solids; getters; leakage currents; p-n homojunctions; secondary ion mass spectra; semiconductor junctions; semiconductor-insulator boundaries; silicon; wafer bonding; SIMS; Si-Si/sub 3/N/sub 4/-SiO/sub 2/; active devices; buried multilayered films; direct bonding technology; gettering; interlayered insulators; leakage current; micro-Raman spectroscopy; pn-junction; poly-Si interlayered SOI structures; spreading resistance; tensile strength; Amorphous materials; Diodes; Fabrication; Gettering; Leakage current; Rough surfaces; Semiconductor films; Silicon on insulator technology; Surface roughness; Wafer bonding;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1993. IEDM '93. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-1450-6

Type

conf

DOI

10.1109/IEDM.1993.347267

Filename

347267