Title :
A sub-0.1-/spl mu/m grooved gate MOSFET with high immunity to short-channel effects
Author :
Tanaka, J. ; Kimura, S. ; Noda, H. ; Toyabe, T. ; Ihara, S.
Author_Institution :
Central Res. Lab., Hitachi Ltd., Tokyo, Japan
Abstract :
Grooved gate MOSFETs in the sub-0.1-/spl mu/m regime have been studied by both experiments and simulations. Phase-shifted lithography was used to realize sub-0.1-/spl mu/m gate length. The fabricated device shows no threshold voltage roll-off into sub-0.1-/spl mu/m regime. The effects of the grooved gate structures are investigated using a nonplanar device simulator, and the optimization of the groove corner shape is found to be important to obtain high device performance.<>
Keywords :
insulated gate field effect transistors; simulation; 0.1 micron; groove corner shape; grooved gate MOSFET; nonplanar device simulator; phase-shifted lithography; short-channel effects immunity; Doping; Electrodes; Fabrication; Geometry; Impurities; MOSFET circuits; Shape; Solid modeling; Threshold voltage; Tungsten;
Conference_Titel :
Electron Devices Meeting, 1993. IEDM '93. Technical Digest., International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-1450-6
DOI :
10.1109/IEDM.1993.347293
