DocumentCode :
2313578
Title :
Fault tolerance in rearrangeable networks
Author :
Feng, Tse-yun
Author_Institution :
Dept. of Electr. & Comput. Eng., Pennsylvania State Univ., University Park, PA, USA
fYear :
1990
fDate :
24-27 Sep 1990
Firstpage :
399
Abstract :
Following a brief introduction to multistage interconnection networks in general and the Benes rearrangeable network in particular, the author presents techniques for achieving fault tolerance through appropriate manipulation of faulty networks without adding any hardware components. The author also shows how different types of faults at different locations can be tolerated with minimal performance degradation. Since a number of multistage blocking networks are topologically equivalent, the techniques described may be adapted to other rearrangeable network configurations, whether they are symmetrical or asymmetrical. Several examples are given to illustrate the techniques presented
Keywords :
fault tolerant computing; multiprocessor interconnection networks; Benes rearrangeable network; fault tolerance; multistage blocking networks; multistage interconnection networks; rearrangeable network configurations; Broadcasting; Computer networks; Degradation; Fault tolerance; Hardware; Intelligent networks; Multiprocessor interconnection networks; Routing; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer and Communication Systems, 1990. IEEE TENCON'90., 1990 IEEE Region 10 Conference on
Print_ISBN :
0-87942-556-3
Type :
conf
DOI :
10.1109/TENCON.1990.152641
Filename :
152641
Link To Document :
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