CAD-compatible high-speed CMOS/SIMOX technology using field-shield isolation for 1 M gate array

Author

Iwamatsu, T. ; Yamaguchi, Y. ; Inoue, Y. ; Nishimura, T. ; Tsubouchi, N.

Author_Institution

ULSI, Mitsubishi Electr. Corp., Hyogo, Japan

fYear

1993

fDate

5-8 Dec. 1993

Firstpage

475

Lastpage

478

Abstract

A specific 0.5 /spl mu/m CMOS/SIMOX technology was developed for a 1 M gate array/SOG (Sea Of Gates) using field-shield (FS) isolation to overcome a pending problem of source-to-drain breakdown voltage (BV ds) lowering. The ring oscillator fabricated on the FS isolated SOG gate array exhibited 1.7 times higher speed operation than that on a bulk-Si counterpart keeping the lower power consumption feature even at a relatively high drain voltage of 3 V.<>

Keywords

CMOS integrated circuits; SIMOX; application specific integrated circuits; integrated circuit technology; integrated logic circuits; logic arrays; 0.5 micron; 3 V; CAD-compatible technology; SOG array; Si; field-shield isolation; gate array; high-speed CMOS/SIMOX technology; ring oscillator; sea of gates; source-to-drain breakdown voltage; CMOS technology; Electrodes; Ion implantation; Isolation technology; MOSFETs; Semiconductor films; Silicides; Substrates; Ultra large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1993. IEDM '93. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-1450-6

Type

conf

DOI

10.1109/IEDM.1993.347307

Filename

347307