A 0.5 /spl mu/m CMOS technology for multifunctional applications with embedded FN-flash memory and linear R and C modules

Author

Heinrich, R. ; Heinrigs, W. ; Tempel, G. ; Winnerl, J. ; Zettler, T.

Author_Institution

Semicond. Group, Siemens AG, Munich, Germany

fYear

1993

fDate

5-8 Dec. 1993

Firstpage

445

Lastpage

448

Abstract

A 0.5 /spl mu/m CMOS technology was developed for multifunctional applications. Based on a high performance logic process for 3.3 V supply voltage a non volatile memory module and highly linear resistors and capacitors were implemented. The flash memory is programmed and erased by Fowler-Nordheim (FN) tunneling. The extremely low power consumption of the FN cell allows the in system programming with a single 3.3 V supply, which is especially important in portable systems. Bit programming and erasing times are typically 1 ms and 100 /spl mu/s, respectively. With page mode (128 bit) programming times of 10 /spl mu/s per bit are achieved. The endurance is better than 10/sup 5/ cycles.<>

Keywords

CMOS integrated circuits; EPROM; integrated circuit technology; mixed analogue-digital integrated circuits; 0.5 micron; 1 ms; 100 ms; 3.3 V; CMOS technology; Fowler-Nordheim tunneling; bit programming time; embedded FN-flash memory; endurance; erasing time; in system programming; linear capacitors; linear resistors; low power consumption; multifunctional applications; nonvolatile memory; page mode; portable systems; supply voltage; CMOS technology; Channel hot electron injection; Etching; Flash memory; Low voltage; MOSFET circuits; Nonvolatile memory; Resistors; Threshold voltage; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1993. IEDM '93. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-1450-6

Type

conf

DOI

10.1109/IEDM.1993.347314

Filename

347314