Title :
Suppression of boron penetration into an ultra-thin gate oxide (/spl les/7 nm) by using a stacked-amorphous-silicon (SAS) film
Author :
Shye Lin Wu ; Chung Len Lee ; Tan Fu Lei
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
The effect of boron penetration through an ultra-thin oxide (/spl les/7 nm) can be suppressed by using a stacked-amorphous-silicon (SAS) gate structure for pMOSFET. The SAS gate capacitor exhibits a smaller flat-band voltage shift, a lesser charge trapping and interface state generation rate, and a larger charge-to-breakdown than those of the as-deposited poly-Si (ADP) gate capacitor. The SiO/sub 2Si and poly-Si/SiO/sub 2/ interfaces of the SAS gate are also much smoother than those of the ADP gate,.<>
Keywords :
amorphous semiconductors; electron traps; elemental semiconductors; insulated gate field effect transistors; interface electron states; ion implantation; semiconductor-insulator boundaries; silicon; 7 nm; SAS gate capacitor; Si-SiO/sub 2/; charge trapping rate; charge-to-breakdown; flat-band voltage shift; interface state generation rate; ion implantation; pMOSFET; poly-Si/SiO/sub 2/ interfaces; stacked-amorphous-silicon film; ultra-thin gate oxide; Annealing; Boron; Capacitors; MOSFET circuits; Pressure control; Substrates; Synthetic aperture sonar; Temperature; Thermal stresses; Voltage;
Conference_Titel :
Electron Devices Meeting, 1993. IEDM '93. Technical Digest., International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-1450-6
DOI :
10.1109/IEDM.1993.347341
