New design approach for configurable data-path

Author

Shiochi, Masazumi ; Tanaka, Yutaka ; Enkaku, Motohiro ; Saigo, Takashi ; Suzuki, Hiroaki

Author_Institution

Toshiba Corp., Kawasaki, Japan

fYear

1990

fDate

13-16 May 1990

Abstract

The approach described can be used to develop a configurable data-path that has high flexibility, high density, and high performance. It can realize a 32-bit data path array plane in 1.08 mm×1.23 mm using 0.8-μm CMOS double-metal technology with 6.86 ns arithmetic and logic unit (ALU) operation. By using this design approach for a data path, it is possible to implement a register file and ALU on the same array. The application of the approach to a 32-bit 2901/02 system is discussed

Keywords

CMOS integrated circuits; VLSI; application specific integrated circuits; circuit layout CAD; microprocessor chips; 0.8 micron; 1.08 to 1.23 mm; 2901/02 system; 2901/2902 system; 32 bit; 6.86 ns; ALU; CMOS; arithmetic and logic unit; configurable data-path; data path array plane; design approach; double-metal technology; high density; high flexibility; high performance; register file; Application specific integrated circuits; Automatic control; Automatic generation control; CMOS logic circuits; CMOS technology; Central Processing Unit; Decoding; Digital signal processing; Driver circuits; Logic design;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1990., Proceedings of the IEEE 1990

Conference_Location

Boston, MA

Type

conf

DOI

10.1109/CICC.1990.124736

Filename

124736