FIRGEN: a CAD system for automatic layout generation of high-performance FIR filter

Author

Jain, R. ; Chien, C. ; Tan, L.K. ; Yoshino, Tomonobu

Author_Institution

Dept. of Electr. Eng., California Univ., Los Angeles, CA

fYear

1990

fDate

13-16 May 1990

Abstract

A novel functional compiler, FIRGEN, for automatic generation of finite-impulse response (FIR) filters using custom and gate-array technologies is described. It consists of CAD tools to automate the entire design from filter specifications to final chip layout. The architecture and floorplan description generation by FIRGEN can be used to drive custom macrocell or gate-array place and route tools to generate the final layout. A unique feature of the compiler is that it uses architecture and floorplanning techniques that are targeted at FIR filters with sample rates in the region 10-100 MHz for video and digital communication applications. Results of three chips designed with FIRGEN are presented

Keywords

circuit layout CAD; digital filters; logic arrays; 10 to 100 MHz; CAD system; CAD tools; FIR filters; FIRGEN; automatic layout generation; custom macrocell; filter specifications; final chip layout; final layout; floorplan description; floorplanning techniques; functional compiler; gate-array technologies; high-performance FIR filter; place and route tools; sample rates; CMOS technology; Circuits; Delay; Design automation; Digital communication; Finite impulse response filter; Libraries; Macrocell networks; Pipeline processing; Power dissipation;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1990., Proceedings of the IEEE 1990

Conference_Location

Boston, MA

Type

conf

DOI

10.1109/CICC.1990.124737

Filename

124737