DocumentCode
2314665
Title
Exploiting redundancy in bit-pipelined rational arithmetic
Author
Kornerup, Peter ; Matula, David W.
Author_Institution
Odense Univ., Denmark
fYear
1989
fDate
6-8 Sep 1989
Firstpage
119
Lastpage
126
Abstract
The authors develop and analyze a redundant continued-fraction representation of the rationals in the implementation of an arithmetic unit for computing the sum, difference, product, quotient, and other useful functions of two rational operands. Their representation of operands and results allows the computations of the unit to be performed in a signed bit-serial, online fashion. Several such units can then be interconnected for the computation of more complicated expressions in a pipelined manner. Redundancy is used to help achieve a small bounded online delay and uniform throughput
Keywords
digital arithmetic; bit-pipelined rational arithmetic; difference; online delay; product; quotient; redundancy exploiting; redundant continued-fraction representation; signed bit-serial; sum; uniform throughput; Algorithm design and analysis; Arithmetic; Artificial intelligence; Councils; Delay; Genetic expression; Pipelines; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic, 1989., Proceedings of 9th Symposium on
Conference_Location
Santa Monica, CA
Print_ISBN
0-8186-8963-3
Type
conf
DOI
10.1109/ARITH.1989.72817
Filename
72817
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